Skip to main content
Home

Main menu

  • Home
  • Hardware
    • Product Overview
      • SoCs
      • Modules
      • DevKits
      • Equipment
      • Product Selector
    • ESP32-Wrap
      • ESP32-P
        • ESP32-P4
      • ESP32-S
        • ESP32-S3
        • ESP32-S2
      • ESP32-C
        • ESP32-C6
        • ESP32-C61
        • ESP32-C5
        • ESP32-C3
        • ESP32-C2
      • ESP32-H
        • ESP32-H2
      • ESP32
        • ESP32
      • ESP8266
        • ESP8266
  • SDKs
    • ESP-IDF
      • IDF Component Manager
    • ESP-Matter SDK
    • Zephyr® for Espressif
    • ESP-Arduino
    • ESP-AT
      • Overview
      • Resources
    • ESP-HOSTED
    • ESP-ADF
    • ESP-Mesh-Lite
    • ESP HomeKit SDK
    • ESP-BLE-MESH
  • Cloud
    • Special Menu
      • ESP RainMaker®
      • ESP Insights
    • Cloud Menu
      • ESP RainMaker®
        • Homepage
        • Product Brief
        • Tech Blogs
        • Customer Stories
      • ESP Insights
        • Homepage
        • Tech Blogs
        • Get Started
        • Dashboard
      • Cloud Services
        • Maintain & Iterate
        • Tools Support
        • Consult & Customize
      • Develop Resources
        • Get Started
        • GitHub Repository
        • Client APPs
          • Nova Home (Source Code Available)
          • ESP RainMaker (Fully Open Source)
        • Dashboard (Public)
      • Solution Integration
        • Matter Fabric
        • ESP-Mesh-Lite
        • AWS IoT ExpressLink
  • Solutions
    • Special Menu
      • ESP Matter Offerings
    • Solutions Menu
      • Device Connectivity
        • Remote Debugging Platform (ESP Insights)
        • ACK Solution (Alexa Connect Kit)
        • ACS Solution (Amazon Common Software)
        • ESP AWS IoT ExpressLink Solution
      • Low-Power Solutions
        • Wireless Communication Protocol (ESP-NOW)
        • ESP Smart Switch Solution
      • HMI
        • Smart Displays
      • Audio Solutions
        • ESP Audio Front-End Algorithms
      • AI Solutions
        • Face Detection (ESP-WHO)
        • Voice Assistant (ESP-SR)
          • Overview
          • Resources
      • Peripherals
        • Device Drivers
        • USB Solutions
  • Support
    • Technical Documents
      • All Types
      • SoCs
      • Modules
      • DevKits
      • Equipment
    • Services
      • Self-Service Resources
      • Open Software
      • Hardware & RF
      • Cloud
      • Certification
      • Manufacturing
      • On-Site Assistance
    • Download
      • Technical Document
      • SDKs & Demos
      • APPs
      • Tools
      • ESP-AT
    • Quality & Reliability
      • Certifications & Compliance
      • PCNs
      • Advisories
      • Longevity Commitment
    • FAQ
      • ESP-FAQ
      • Commercial FAQ
  • Ecosystem
    • Partnership and Resource
      • AWS Technology Partner
      • Third-Party Platforms
      • Third-Party SDKs
    • Education
      • ESP Education
    • Developer Zone
      • ESP Developer Portal
      • Espressif DevCon
      • Tech Blogs
      • ESP32 Forum
    • Community
      • Courses
      • Rust
      • Books
      • Videos
      • Projects
  • Company
    • About Us
      • About Espressif
      • Milestones
      • CEO Messages
      • Logo Guidelines
    • Newsroom
      • News
      • Newsletter
      • Tech Blogs
      • Events
    • Investor Relations
      • Reports
      • Investor Inquiries
    • Corporate Responsibility
      • Reports
      • Wildlife Protection
    • Join Us
      • Espressif Careers
      • Find Your Job
  • Contact
    • Contact Sales
    • Technical Inquiries
    • Circuit Schematic & PCB Design Review
    • Get Samples
    • Become Our Supplier
    • Comments & Suggestions

Search form

Search
  • English
  • 简体中文
  • 日本語
Subscribe
  • Find Your Job

You are here

Home » 公司 » 加入我们 » 星光本科人才计划
Internships
Graduates
Experienced
8 Jobs Found
找到 8 个职位
  • NPU Design Engineer
    Experienced
    IC Design
    • Singapore
      • Singapore
    2025.08.07

    Job Responsibilities:

    As a core design member of the NPU (Neural Processing Unit) project, you will be responsible for RTL design, optimization, and verification of key modules in AI accelerators (NPU), contributing to the delivery of high-performance, low-power chips. Specific responsibilities include:

    1. Participate in NPU architecture evaluation and microarchitecture definition;

    2. Design and implement RTL for core NPU components such as MAC arrays, PE arrays, control units, on-chip memory (SRAM/BRAM), and DMA modules;

    3. Support front-end synthesis, formal verification, equivalence checking, and timing closure;

    4. Collaborate with the software team to support simulation models, instruction debugging, and performance analysis.

    Job Requirements:

    1. Bachelor’s degree or above in Computer Engineering, Electrical Engineering, Microelectronics, or related fields

    2. Ideal candidate have at least 5 years of relevant professional experience in NPU/DSP/GPU/image processing chip design

    3. Proficient in Verilog/SystemVerilog, with strong RTL design skills at the module level;

    4. Understanding of AI architectures, including matrix/vector computation acceleration, convolution acceleration, memory access scheduling, etc.

    5. Familiarity with standard digital design flows, such as synthesis (DC), timing analysis, formal verification, and simulation (VCS);

    6. Strong debugging and documentation skills.

    Preferred Qualifications:

    1. Familiarity with advanced AI model architectures, principles, and key parameters;

    2. Knowledge of SoC interface protocols such as AXI, AHB, NoC, DMA;

    3. Experience in PPA (Power, Performance, Area) optimization and low-power design techniques;

    4. Ability to write Python/TCL scripts for automated design flows is a plus.

    Apply Now
    recruit.sgpr@espressif.com
  • Digital IC Verification Engineer
    Experienced
    IC Design
    • Singapore
      • Singapore
    2025.07.14

    Job Responsibilities:

    • Develop verification plans based on design documents, define module-level verification strategies, build verification environments and frameworks, and complete both module-level and chip-level verification
    • Execute regression testing to improve verification coverage
    • Work with chip design engineers to identify and fix design defects; ensure the completeness of chip design and guide the design team to follow a verifiable design process
    • Conduct gate-level simulation and formal verification with UPF to ensure successful tape-out

    Job Requirements:

    • Bachelor's degree or above in Computer Engineering, Electronic Engineering, Communications Engineering, or related fields
    • Ideal candidates will have at least 3 years of professional experience
    • Familiarity with digital SoC or communication module principles
    • Familiar with Verilog and proficient in C / SystemVerilog for verification
    • Proficient in scripting languages such as Perl / Shell / Tcl
    • Familiarity with VMM / UVM is a plus.
    Apply Now
    recruit.sgpr@espressif.com
  • Analog IC Design, Graduate Engineer
    Graduates
    IC Design
    • Singapore
      • Singapore
    2025.08.15

    Job Responsibilities

    1.        Responsible for the design, simulation, and verification of analog circuits

    2.        Perform layout floor plan simulations and ensure optimization

    3.        Collaborate with layout engineers to finalize circuit design work

    4.        Prepare comprehensive design documentation and maintain detailed records throughout project lifecycle

    5.        Coordinate with application, product, and test engineers to ensure successful mass production of the product

     

    Job Requirements

    1.        Bachelor's degree or above in Microelectronics, Electronic Engineering, Communication Engineering, or related fields

    2.        Solid foundational knowledge in analog circuit design principles

    3.        Hands-on experience in designing one or more of the following circuits: LDO, Oscillator, IO, ESD, ADC, DAC, PLL, and filters

    4.        Proficiency in at least one programming language such as Python, MATLAB, or C

    5.        Strong problem-solving skills and good communication and learning abilities.

    6.        Passion for analog circuit design, with a strong interest in advancing knowledge and skills in this field

    Apply Now
    recruit.sgpr@espressif.com
  • Digital IC Verification, Graduate Engineer
    Graduates
    IC Design
    • China
      • Shanghai
    • Singapore
      • Singapore
    2025.08.15

    Job Responsibilities

    1.        Define verification plans and test cases based on chip design specifications, and establish the verification environment

    2.        Collaborate with chip design engineers in identifying and fixing design defects and continuously improve verification coverage

    3.        Participate in gate-level simulation and formal verification

    4.        Optimize tools and the verification environment to enhance verification efficiency

     

    Job Requirements

    1.        Bachelor's degree or above in Electronic Engineering, Computer Engineering, Computer Science, or related fields

    2.        Familiar with Verilog, C, System Verilog, UVM

    3.        Familiar with scripting languages such as Perl, Shell, and or Tcl

     

    Apply Now
    recruit.sgpr@espressif.com
  • Digital IC Design, Graduate Engineer
    Graduates
    IC Design
    • China
      • Shanghai
    • Singapore
      • Singapore
    2025.08.15

    Job Responsibilities

    1.        Micro-architecture & RTL development for Al compute subsystems

    2.        Analyze performance, power, and area (PPA) to deliver high-performance compute within strict cost and energy budget

    3.        Collaborate with verification teams to execute module-level and system-level validation

    4.        Support driver development, debugging, and technical documentation throughout the project life cycle

     

    Job Requirements

    1.        Bachelor's degree or above in Electrical Engineering, Computer Engineering or related fields

    2.        Strong grasp of digital-circuit fundamentals and a keen eye for performance, power, and area trade-offs

    3.        Solid knowledge of computer architecture, neural-network processing, bus architectures, and memory systems

    Apply Now
    recruit.sgpr@espressif.com
  • Analog Design Engineer
    Experienced
    IC Design
    • China
      • Shanghai
    • Singapore
      • Singapore
    2024.08.19

    Espressif Systems is a global leader in innovative wireless SoC and IoT solutions, with a strong focus on designing and developing cutting-edge products. Our mission is to empower a smart and connected world through continuous innovation and unparalleled customer support.

    We are seeking a highly motivated, skilled, and passionate Analog IC Designer to join our team. The successful candidate will possess a genuine interest in analog design, a strong ability to learn independently, and be hands-on in their approach to design work.

    Key Responsibilities

    1. Develop and optimize analog circuits for various applications, including but not limited to power management, buck converters, bandgap references, crystal oscillators, phase lock loops, power amplifiers, low noise amplifiers, signal conditioning, and data converters.

    2. Independently learn and stay updated on the latest trends and best practices in analog design.

    3. Perform hands-on design and layout of critical circuits, ensuring high performance and reliability.

    4. Create accurate and efficient models of analog components and systems for simulation purposes.

    5. Derive transfer functions of circuits to analyze and predict system performance.

    6. Collaborate effectively with cross-functional teams, including digital designers, firmware engineers, and system architects to meet tight project schedules.

    7. Maintain a careful and meticulous approach to design work, ensuring thorough documentation, testing, and validation of designs.

    Qualifications

    1. Bachelor's or Master's degree in Electrical Engineering or a related field.

    2. years of experience in analog design, preferably in the semiconductor or wireless communication industry.

    3. Demonstrated expertise in analog circuit design, simulation, and layout tools, such as Cadence Virtuoso, MMSIM, SpectreRF, AMS, QRC, Calibre, or similar.

    4. Strong knowledge of analog design principles, circuit analysis, amplifier compensation, component matching, device reliability, ESD design, etc.

    5. Proficient in building and validating models for analog components and systems.

    6. Familiarity with deriving and analyzing transfer functions of circuits to predict system performance.

    7. Excellent teamwork and communication skills, with a proven ability to work effectively in a fast-paced, collaborative environment.

    8. Strong attention to detail, with a meticulous and methodical approach to design work and problem-solving.

    9. Ability to work well under pressure, meet tight deadlines, and adapt to changing priorities.

    Apply Now
    recruit.sgpr@espressif.com
  • Digital Design Engineer / Lead
    Experienced
    IC Design
    • India
      • Pune
    2020.07.20

    Basic Qualications:

    1. M.Tech/B. Tech in the field of VLSI/Electronics engineering.

    2. Proficiency in System Verilog for RTL logic design and verification.

    3. Experience in UPF based low power design flow.

    4. EDA tool knowledge of Design Compiler, PrimeTime is preferred.

    5. Automation skills in PERL and/or TCL and/or Shell is an added plus.

    6. Team player,with good problem solving and communication skills.

    Job Description:

    1. Digital IP design and SoC integration.

    2. Perform Lint/CDC/LEC/Low-Power analysis at IP/SoC level.

    3. Module level synthesis and timing constraints.

    4. Must have worked on ARM/RISC-V CPU based designs.

    5. Familiarity with FPGA/Silicon validation using C based tests and usage of standard debugging tools.

    6. Familiarity with design of digital MAC/baseband/high-speed interface/CPU or DSP is a plus.

    Interpersonal Skills:

    1. Energetic, self-motivated

    2. Pro-active, oriented on execution

    3. Attentive to details and quality

    4. Team player

    5. Good communications and reporting skills 

    Apply Now
  • Digital Verification Engineer / Lead
    Experienced
    IC Design
    • India
      • Pune
    2020.07.20

    Basic Qualification:

    1. M. Tech / B. Tech in the field of VLSI/Electronics engineering.

    2. Proficiency in UVM/SV and C/C++ based functional verification.

    3. Experience in UPF based low power design verification.

    4. Automation skills in PERL and/or TCL and/or Shell.

    5. Team player, with good problem solving and communication skills.

    Job Description:

    1. Drive functional verification at IP/SoC level using UVM/SV test bench.

    2. Work closely with design team to define comprehensive feature test plans.

    3. Perform functional and code coverage for logic verification sign-off.

    4. Must have worked on ARM/RISC-V CPU based designs.

    5. Must have performed gate level sim at SoC level.

    6. Pre and Post-silicon debug/verification experience will be a plus.

    Interpersonal Skills:

    1. Energetic, self-motivated

    2. Pro-active, oriented on execution

    3. Attentive to details and quality

    4. Team player

    5. Good communications and reporting skills

    Apply Now

Stay Informed with Us

Get the latest on innovations, product launches, upcoming events, documentation updates, PCN notifications, advisories, and more.

  • PRODUCTS
  • SoCs
  • Modules
  • DevKits
  • Product Selector
  • DEVELOPERS
  • Developer Portal
  • ESP DevCon
  • Tech Blogs
  • News
  • COMPANY
  • About Espressif
  • Logo Guidelines
  • Sales Questions
  • Careers
  • RESOURCES
  • Tech Documents
  • GitHub
  • ESP-FAQ
  • Get Samples
  • linkdin
  • youtube
  • twitter
  • facebook
  • ins
  • github

Copyright © 2025 Espressif Systems. All rights reserved.

沪公网安备 31011502019094 号

沪ICP备2021026420号
  • Terms of Service
  • Privacy Policy
690 Bibo Road Block 2 Suite 204, Zhangjiang Shanghai, China

Languages

  • English
  • 简体中文
  • 日本語
/